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When Panasonic said it would ship its first parts based on a 32nm high-k, metal-gate process by last October, technical analyst firm Dick James of Chipworks was confident the company would hit its deadline and beat many of the other companies planning HKMG.
It took a while but James says Chipworks has now found a Panasonic part that uses the gate-first HKMG process – in contrast to the gate-last process used by Intel for its PC processors. Although the HKMG structure lowers gate leakage, it has typically been deployed on high-power parts because it makes more of a difference there to overall performance – and subthreshold leakage is a bigger concern to those worried about energy consumption anyway. Many planning 28nm and 32nm low-power parts reckon it’s still possible to stick with regular silicon oxynitride gates.
However, Panasonic has chosen to go with HKMG for parts that ostensibly are intended for low-power systems. Analysis by Chipworks so far has established that Panasonic has used little in the way of strain techniques. “The only concession to PMOS enhancement was wafer rotation to give a <100> channel direction,” James writes.
In principle, there should be little difference in terms of power consumption whether the HKMG process is gate-first or gate-last but further analysis may reveal whether Panasonic’s choice has improved overall die utilisation. For an advanced part, it has a relatively small die size: just 45mm².
Posted by Chris Edwards
The Low-Power Design Blog is sponsored by Mentor Graphics. The company has focused years of R&D on low-power design techniques and is glad to support a resource that highlights creative methods for reducing the power consumption of electronic systems.
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